Introduction

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RW - Read & Write utility, for hardware engineers, firmware (BIOS) engineers, driver developers, QA engineers, performance test engineers, diagnostic engineers, etc., This utility access almost all the computer hardware, including PCI (PCI Express), PCI Index/Data, Memory, Memory Index/Data, I/O Space, I/O Index/Data, Super I/O, Clock Generator, DIMM SPD, SMBus Device, CPU MSR Registers, ATA/ATAPI Identify Data, Disk Read Write, ACPI Tables Dump (include AML decode), Embedded Controller, USB Information, SMBIOS Structures, PCI Option ROMs, MP Configuration Table, E820, EDID and Remote Access. And also an Command Window is provided to access hardware manually.

Website: http://rweverything.myweb.hinet.net/

Mirror: http://rweverything.phpnet.us/

For best view, please change the screen resolution to 1024 x 768 (or above) pixels.


How to ...

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Run setup to install RW into your system or unzip the portable version and run rw.exe.


Overview

RW (Read & Write) is a Windows base utility support XP/XP64/Vista/Vista64/Win7/Win7_64.

This utility comes with ABSOLUTELY NO WARRANTY, it allows you to modify hardware settings, this may damage your system if something goes wrong. Author will not take any responsibility about that, you are on your own risk.

This utility should not be used in commercial products.


Access ...

This topic runs through all sub-functions that RW provided, check the topics below.


PCI (PCI Express)

This function will scan the PCI bus and provide all the configuration space to user, user may read or write all the registers; the interface is simple and straightforward. Double click on the BAR (Base Address Register, Range: 0x10 - 0x27) will open the related Memory/IO space. For PCI Express device, use PageUp/PageDown in the data window to access Previous/Next page.

Also the summary window provides the meaning of some main information of PCI standard configuration space.

Special note is the information window, RW will auto load PCISTD.IRW for standard PCI and load PCIBRI.IRW for PCI-to-PCI bridge device, and then will load the .IRW file named device ID+vendor ID if it exists, for example, if the DID+VID is 0x12345678, then 12345678.IRW will be tried to load onto the information window.

Anyone may create the information file for specific device, just follow the example file "25308086.IRW" which is for Intel 850E north bridge, and of course, follow the device specification.


PCI Index/Data

Access data through Index register and Data register on PCI device, totally 256 DWORDs on two pages, starting address and stepping can be selected.

Read Algorithm:

1. Address = [Start Address]

2. Write Address to [Index Register]

3. Read Data from [Data Register]

4. Address = Address + [Address Step]

5. Repeat 2, 3, 4 to read 256 DWORDs

Write Algorithm:

1. Write Address to [Index Register]

2. Write Data to [Data Register]


Memory

This sub-function read or write all system memory on linear mode, start address may locate at any address within 4GB.

When use "Save as binary" function, a popup dialog will show up to get start adress and length from user.


Memory Index/Data

Access data through Index register and Data register on Memory space, totally 256 DWORDs on two pages, starting address and stepping can be selected.

Read Algorithm:

1. Address = [Start Address]

2. Write Address to [Index Register]

3. Read Data from [Data Register]

4. Address = Address + [Address Step]

5. Repeat 2, 3, 4 to read 256 DWORDs

Write Algorithm:

1. Write Address to [Index Register]

2. Write Data to [Data Register]


I/O Space

This sub-function access I/O ports with x86 IN and OUT instructions. 16-bit decode, byte access only when read, byte/word/dword access on write depending on the current display format of the read & write window. i.e. when you switch to word access and try to write data to the I/O port, RW will use word-accessing method.

There is no default information file; user must load their specific information file manually.


I/O Index/Data

This sub-function access I/O with index/data ports with byte-accessing protocol only. Enter config key option is provided for the space needs prefix command to open the access right, such as Super IO device, refer to Config Key for more.

There is no default information file; user must load their specific information file manually.


Super I/O

This sub-function access the detected Super I/O device, which is one of the [SUPERIO] items described in RW.INI, user may add new Super I/O device if it is not supported by default, for detail information to edit the RW.INI file, please refer to the Initial File topic. If the Super IO chipset is not supported, user may enter index/data port and enter config key command to access it manually.


Config Key

Usually, super I/O chipset working on normal mode and registers cannot be accessed, it needs a command to open the configuration mode, that's called Config Key, if the super I/O chip does not detected by RW, user may enter the Config Key in the commad box to access it, for commands format, please refer to Command.


Clock Generator

The clock generator sub-function lets user to read or write the clock chip registers through the SM bus interface (Slave address = 0xD2, Block mode), the SM bus access interface is described in RW.INI, user may add SM bus entry for new chipset if it is not supported by RW.

Important: RW use the SM bus block command to access the clock generator, it does not care about the definition of the clock chip registers, the specification of the system clock chip must be fully understood if user want to modify the register, any abnormal write to the clock chip will totally crash the system.

Some platform design may not use SM bus to access the clock chip, then this function is not work.


DIMM SPD

DIMM SPD use the SM bus protocol to read the DIMM's SPD data, and this sub-function use byte read protocol only, to write the SPD data is not allowed.

The summary screen provides the meaning of some main information of the DIMM.

RW will load the information file DDRSPD.IRW for DDR memory, DDR2SPD.IRW for DDR2 memory, or load SDRSPD.IRW for SDR memory.


SMBus Device

This function allow users to access any address on SMBus, with byte, word or block access mode, you may read or write on the device.

Special note for SMBus address: Bit[7:1] = SMBus address, bit0 is don't care and it will be changed by RW according to reading or writing.


CPU MSR Registers

Read and write the CPU MSR registers, provide summary for MTRR registers.

User list can be modified to add or remove MSR registers.

Double click to launch the MSR register edit function.


ATA/ATAPI Identify Data

Report ATA/ATAPI devices' identify data, totally 256 words.

Support IDE, RAID and AHCI controllers.


Disk Raw Read/Write

Access hard disk data with LBA address.

Warning: Writing wrong data may destroy your system, suggest to use it on test platform only.


ACPI Tables Dump

This sub-function dump all the ACPI tables, support ACPI specification up to 4.0.

Also the decode AML to ASL function is provided, but it is not fully tested.

Error report is welcome:

If error happens at this function, modify RW.INI with any text editor, change the line RwDebug=0 to RwDebug=1, then run RW again, it will generate RwDebug.rw debug information file, send it to ckimchan.tw@yahoo.com.tw to report the issue.


Embedded Controller

Follow ACPI Embedded Controller specification to access EC RAM.

Read Algorithm:

1. Address = [EC_SC]

2. Wait EC free

3. Write 0x80 to [EC_SC]

4. Wait IBF free

5. Write Address to [EC_DATA]

6. Wait IBF free

7. Wait OBF full

8. Read Data from [EC_DATA]

Write Algorithm:

1. Address = [EC_SC]

2. Wait EC free

3. Write 0x81 to [EC_SC]

4. Wait IBF free

5. Write Address to [EC_DATA]

6. Wait IBF free

7. Write Data to [EC_DATA]

8. Wait IBF free


USB Information

Enumerate all USB host controllers, and the Hubs or Ports attached, report current status and all the descriptors.


SMBIOS Structures

Scan System BIOS area to report SMBIOS structures, support SMBIOS version up to 2.6.


PCI Option ROMs

Search shadow area 0xC0000 to 0xEFFFF for PCI option ROMs.


MP Configuration Table

Search BIOS area to display MP Configuration Table, support specification 1.4.


E820 Table

Get E820 table from BIOS.

Address Range Structure

Offset | Description
00 (Qword) | Base address
08 (Qword) | Length
10 (Dword) | Type

Address Range Types

Value | Description
1 | AddressRangeMemory: This range is available RAM usable by the operating system.
2 | AddressRangeReserved: This range of addresses is in use or reserved by the system and must not be used by the operating system.
3 | AddressRangeACPI: ACPI Reclaim Memory. This range is available RAM usable by the OS after it reads the ACPI tables.
4 | AddressRangeNVS: ACPI NVS Memory. This range of addresses is in use or reserve by the system and must not be used by the operating system. This range is required to be saved and restored across an NVS sleep.
5 | AddressRangeUnusuable: This range of address contains memory in which errors have been detected. This range must not be used by the OSPM.
Other | Undefined: Reserved for future use. OSPM must treat any range of this type as if the type returned was AddressRangeReserved.


EDID Data

EDID

Get EDID from registry and decipher them.


Remote Access

For LPT port remote access, the LPT RW debug module must be running at the target system, it will retrieve data from target system so that you may watching the status at the specific time.

For COM port remote access, it will capture the message from remote target system.

Some of the functions may not be used at remote system.


Command

This window provide simple commands list below:

Command | Description
I <port> | Read I/O port byte (8-bit) data
I16 <port> | Read I/O port word (16-bit) data
I32 <port> | Read I/O port dword (32-bit) data
O <port> <data> | Write I/O port byte (8-bit) data
O16 <port> <data> | Write I/O port word (16-bit) data
O32 <port> <data> | Write I/O port dword (32-bit) data
IID <index> <data> <offset> | Read Index/Data port byte (8-bit) data
IID16 <index> <data> <offset> | Read Index/Data port word (16-bit) data
IID32 <index> <data> <offset> | Read Index/Data port dword (32-bit) data
OID <index> <data> <offset> <value> | Write Index/Data port byte (8-bit) data
OID16 <index> <data> <offset> <value> | Write Index/Data port word (16-bit) data
OID32 <index> <data> <offset> <value> | Write Index/Data port dword (32-bit) data
RPCI <bus#> <dev#> <fun#> <offset> | Read PCI byte (8-bit) data
RPCI16 <bus#> <dev#> <fun#> <offset> | Read PCI word (16-bit) data
RPCI32 <bus#> <dev#> <fun#> <offset> | Read PCI dword (32-bit) data
RPCIE <bus#> <dev#> <fun#> <offset> | Read PCI Express byte (8-bit) data
RPCIE16 <bus#> <dev#> <fun#> <offset> | Read PCI Express word (16-bit) data
RPCIE32 <bus#> <dev#> <fun#> <offset> | Read PCI Express dword (32-bit) data
WPCI <bus#> <dev#> <fun#> <offset> <value> | Write PCI byte (8-bit) data
WPCI16 <bus#> <dev#> <fun#> <offset> <value> | Write PCI word (16-bit) data
WPCI32 <bus#> <dev#> <fun#> <offset> <value> | Write PCI dword (32-bit) data
WPCIE <bus#> <dev#> <fun#> <offset> <value> | Write PCI Express byte (8-bit) data
WPCIE16 <bus#> <dev#> <fun#> <offset> <value> | Write PCI Express word (16-bit) data
WPCIE32 <bus#> <dev#> <fun#> <offset> <value> | Write PCI Express dword (32-bit) data
eRPCI <BDF> <offset> | Read PCI byte (8-bit) data (Note1)
eRPCI16 <BDF> <offset> | Read PCI word (16-bit) data (Note1)
eRPCI32 <BDF> <offset> | Read PCI dword (32-bit) data (Note1)
eRPCIE <BDF> <offset> | Read PCI Express byte (8-bit) data (Note1)
eRPCIE16 <BDF> <offset> | Read PCI Express word (16-bit) data (Note1)
eRPCIE32 <BDF> <offset> | Read PCI Express dword (32-bit) data (Note1)
eWPCI <BDF> <offset> <value> | Write PCI byte (8-bit) data (Note1)
eWPCI16 <BDF> <offset> <value> | Write PCI word (16-bit) data (Note1)
eWPCI32 <BDF> <offset> <value> | Write PCI dword (32-bit) data (Note1)
eWPCIE <BDF> <offset> <value> | Write PCI Express byte (8-bit) data (Note1)
eWPCIE16 <BDF> <offset> <value> | Write PCI Express word (16-bit) data (Note1)
eWPCIE32 <BDF> <offset> <value> | Write PCI Express dword (32-bit) data (Note1)
FPCI <DeviceID+VendorID> [Index] | Find PCI Device on Device ID/Vendor ID, if DeviceID = 0xFFFF means ignore DeviceID, if VendorID = 0xFFFF means ignore VendorID. Return BDF if found, return 0xFFFF if device not found. (Note1). Index is the number of match to return (0=first match, 1=second match...)
FPciClass <Base+Sub+Interface> [Index] | Find PCI Device on clase code, if BaseType, SubType or InterfaceType = 0xFF means ignore that factor for comparison. Return BDF if found, return 0xFFFF if device not found. Index is the number of match to return (0=first match, 1=second match...)
R <address> | Read memory address byte (8-bit) data
R16 <address> | Read memory address word (16-bit) data
R32 <address> | Read memory address dword (32-bit) data
W <address> <value> | Write memory address byte (8-bit) data
W16 <address> <value> | Write memory address word (16-bit) data
W32 <address> <value> | Write memory address dword (32-bit) data
DMEM <address> [size] [filename] | Dump memory from address, default size is 256 bytes, save to file is an option.
FMEM <address> <size> <alignment> <index> <data> [/S] | Find data in memory within the begin address and size, alignment is the offset for next comparison, index is the number of match to return (0=first match, 1=second match...), data must be enclosed in double quotes, format can be string or byte value, for byte value must be separated with space. Example: String: "Find data", Byte value: "0x45 45 67 89h 0xAB". Option /S forces data format to string.
SMBUS <Read/Write> <Byte/Word/Block> <Address> <StartOffset> <EndOffset> | SMBus read/write function, after reading, Local0=byte7-0, Local1=byte15-8, .....
RSIO <register> | Read Super I/O register (8-bit) data
RSIO16 <register> | Read Super I/O register (16-bit) data
RSIO32 <register> | Read Super I/O register (32-bit) data
WSIO <register> <value> | Write Super I/O register (8-bit) data
WSIO16 <register> <value> | Write Super I/O register (16-bit) data
WSIO32 <register> <value> | Write Super I/O register (32-bit) data
REC <register> | Read EC register (8-bit) data
REC16 <register> | Read EC register (16-bit) data
REC32 <register> | Read EC register (32-bit) data
WEC <register> <value> | Write EC register (8-bit) data
WEC16 <register> <value> | Write EC register (16-bit) data
WEC32 <register> <value> | Write EC register (32-bit) data
DISK <Read/Write> <DiskIndex> <LBA> | Disk read/write function.
ACPI <Dump/Decode> [Table]/<File> [Index] | Dump ACPI Table or decode saved file.
SMBIOS [Type] | Display SMBIOS structures.
SAVE <filename> <interface> [parameter1] [parameter2]... | Save data to binary file. Supported interface: PCI/Memory/IOSpace/IOID/SMBus/SIO/EC/ACPI/SMBIOS PCI parameters: <Bus#> <Dev#> <Fun#> Memory parameters: <Address> <Length> IOSpace parameter: <Address> IOID parameters: <IndexPort> <DataPort> SMBus parameters: <Byte/Word/Block> <Address> <StartOffset> <EndOffset> SIO parameters: <LDN#> EC parameters: none ACPI parameters: none SMBIOS parameters: none
LOAD <filename> <interface> [parameter1] [parameter2]... | Load data from binary file. Supported interface: PCI/Memory/IOSpace/IOID/SMBus/SIO/EC PCI parameters: <Bus#> <Dev#> <Fun#> Memory parameter: <Address> IOSpace parameter: <Address> IOID parameters: <IndexPort> <DataPort> SMBus parameters: <Byte/Word/Block> <Address> <StartOffset> <EndOffset> SIO parameters: <LDN#> EC parameters: none
ADD <operand1> <operand2> | Add operation
SUB <operand1> <operand2> | Subtract operation
MUL <operand1> <operand2> | Multiply operation
DIV <operand1> <operand2> | Divide operation
MOD <operand1> <operand2> | Modulo operation
AND <operand1> <operand2> | And bit-operation
OR <operand1> <operand2> | Or bit-operation
XOR <operand1> <operand2> | Xor bit-operation
NOT <operand> | Not bit-operation
SHR <operand1> <operand2> | Shift right bit-operation
SHL <operand1> <operand2> | Shift left bit-operation
BSWAP <operand> | Change byte order from big endian to little endian or vice versa.
CMZ <operand> | Complement Zero, if operand = 0 then return -1, if operand != 0 then return 0
RDMSR <register#> | Read CPU MSR register, LocalA, B, C, D=EAX, EBX, ECX, EDX
WRMSR <register#> <EDX> <EAX> [cpu#] [cpu#]... | Write CPU MSR register, option to apply to specify cpu# (1-base), if cpu# = 0 then apply to all CPU.
RDTSC | Read CPU TSC counter, LocalB=High 32Bit, LocalA=Low 32Bit
RDPMC <counter#> | Read CPU performance counter, , LocalB=High 32Bit, LocalA=Low 32Bit
RDCR <register#> | Read CPU control register (0, 2, 3, 4, 8), LocalB=High 32Bit, LocalA=Low 32Bit
WRCR <register#> <High 32Bit> <Low 32Bit> | Write CPU control register (0, 3, 4, 8)
CPUID <parameter> | CPUID instruction, LocalA, B, C, D=EAX, EBX, ECX, EDX
CPU <parameter> | Parameter=1,2... to select working CPU in multiprocessor system.
CMDS{cmds...} | Command group, so that BkIf0/BkIf1 won't break the whole command.
LOOP{count, cmds...} | Loop command group, if count=0 means loop infinitely.
WAIT{result, timeout count, cmds...} | Wait for result with timeout command group, if timeout=0 means wait infinitely.
COUT <message> | Print message to stdout, double ";;" to print ';' and double "}}" to print '}' inside command group (CMDS,LOOP,WAIT). Format specifier % can be user to output local variable: "%[0]L<d/h/b>", for example %Lah output localA in hex format, %0Lah output localA in hex with leading zeros.
CERR <message> | Print message to stderr, double ";;" to print ';' and double "}}" to print '}' inside command group (CMDS,LOOP,WAIT). Format specifier % can be user to output local variable: "%[0]L<d/h/b>", for example %Lah output localA in hex format, %0Lah output localA in hex with leading zeros.
DELAY <millisecond> | Delay millisecond(s)
BKIF0(cmds...) | Break the CMDS, LOOP or WAIT command group if result is zero.
BKIF1(cmds...) | Break the CMDS, LOOP or WAIT command group if result is not zero.
SETENV <Dec/Hex/Bin> <Local#> | Set environment variable local#=value in decimal, hex or binary format, hex format with a zero prior to the local name will set the environment variable with leading zeros.
UNSETENV <Local#> | Unset local# environment variable.
PCITREE | PCI tree.
PCIRES | PCI resource summary.
Local# | Internal variables, where # is hex number 0 - FF, totally 256 variables
Result | Return the last result
Exit | Exit command function
RwExit | Program exit
Logfile [filename] | If [filename] exists then create the log file, otherwise close the log file.

Note1: BDF = (bus# * 0x100) + (dev# * 0x8) + fun#

Refer to RW.INI for example.

User may save the result window to file by clicking the "Save" button, and run that file as batch commands, any line start with ">" will be treated as command to execute, user also may create or modify the batch file to run.

Hex format: with prefix "0x" or with suffix "h".

Binary format: with prefix "0b".


I/O APIC

Memory Mapped I/O APIC Registers:

Offset | Description
00 (Byte) | APIC Index
13-10 (Dword) | APIC Data
20[4:0] (5 bits) | APIC IRQ Pin Assertion (Write only)
40 (Byte) | APIC EOI (Write only)

Indexed I/O APIC Registers:

Offset | Description
00 (Dword) | APIC Identification bit[31:28] = Reserved bit[27:24] = APIC ID bit[23:0] = Reserved
01 (Dword) | APIC Version (Read only) bit[31:24] = Reserved bit[23:16] = Maximum redirection bit[15] = PCI IRQ bit[14:8] = Reserved bit[7:0] = APIC Version
02 (Dword) | APIC Arbitration bit[31:28] = Reserved bit[27:24] = APIC arbitration ID bit[23:0] = Reserved
03 (Dword) | Boot Configuration bit[31:1] = reserved bit[0] = Interrupt delivery mechanism
11-10 (Qword) | I/O redirection - APIC IRQ0
13-12 (Qword) | I/O redirection - APIC IRQ1
15-14 (Qword) | I/O redirection - APIC IRQ2
17-16 (Qword) | I/O redirection - APIC IRQ3
19-18 (Qword) | I/O redirection - APIC IRQ4
1B-1A (Qword) | I/O redirection - APIC IRQ5
1D-1C (Qword) | I/O redirection - APIC IRQ6
1F-1E (Qword) | I/O redirection - APIC IRQ7
21-20 (Qword) | I/O redirection - APIC IRQ8
23-22 (Qword) | I/O redirection - APIC IRQ9
25-24 (Qword) | I/O redirection - APIC IRQ10
27-26 (Qword) | I/O redirection - APIC IRQ11
29-28 (Qword) | I/O redirection - APIC IRQ12
2B-2A (Qword) | I/O redirection - APIC IRQ13
2D-2C (Qword) | I/O redirection - APIC IRQ14
2F-2E (Qword) | I/O redirection - APIC IRQ15
31-30 (Qword) | I/O redirection - APIC IRQ16
33-32 (Qword) | I/O redirection - APIC IRQ17
35-34 (Qword) | I/O redirection - APIC IRQ18
37-36 (Qword) | I/O redirection - APIC IRQ19
39-38 (Qword) | I/O redirection - APIC IRQ20
3B-3A (Qword) | I/O redirection - APIC IRQ21
3D-3C (Qword) | I/O redirection - APIC IRQ22
3F-3E (Qword) | I/O redirection - APIC IRQ23

I/O Redirection Entry Format:

Physical Mode (bit11 = 0)

bit[63:60] = Reserved

bit[59-56] = APIC ID

LogicalMode (bit11 = 1)

bit[63-56] = Destination

bit[55-17] = Reserved

bit[16] = Interrupt Masked (0 = Not Masked, 1 = Masked)

bit[15] = Trigger Mode (0 = Edge sensitive, 1 = Level sensitive)

bit[14] = Remote IRR (read only) (0 = EOI with interrupt vector from local APIC, 1 = Interrupt sent by IOAPIC)

bit[13] = Interrput Input Pin Polarity (0 = Active high, 1 = Active low)

bit[12] = Delivery status (read only) (0 = Idle, 1 = Send pending)

bit[11] = Destination Mode (0 = Physical Mode, 1 = Logical Mode)

bit[10:8] = Delivery Mode

000 - Fixed

001 - Lowest priority

010 - SMI

011 - reserved

100 - NMI

101 - INIT

110 - reserved

111 - External INT

bit[7:0] = Interrupt Vector (Range: 0x10 - 0xFE)


Command Line

Program command line options

Parameter | Description
/Command=<FileName> | Auto execute command interpreter with the input file.
/Command="cmd1;cmd2..." | Execute commands.
/LogFile=<FileName> | Output result to log file.
/Min | Run minimized.
/Nologo | Suppress startup logo.
/Stdout | Output to stdout console. (co-work with /Command)
/Stderr | Output to stderr console. (co-work with /Command)

Example:

1. Rw /Command=Cmd.rw /Logfile=Log.txt


Initial File RW.INI

This topic describe the meaning of each section in RW.INI, also try to explain to user how to add new super I/O and SM bus for new chipsets.

For Super I/O, RW will load the [SUPERIO] section in initial file RW.INI, and auto detect the system entry by entry, once the detection routine return success, the Super I/O function will be available to use, user may add new super I/O entries in RW.INI, for more information, check the initial file topic.

For Clock Generator, DIMM SPD and SMBus Device functions, RW will load the [SMBUS] section in RW.INI, same as the [SUPERIO] section, program will detect the chipset to find out the SM bus controller, and the algorithm provided by this section support the Clock Generator, DIMM SPD and SMBus Device functions. Also, user may add new entries to RW.INI to support new chipsets, check initial file chapter for details.

Note: all value with prefix "0x" or with suffix "h" will be treated as HEX by RW.


Config Section

Section - [Config]

General functions configuration, easy to understand, usually, you do not need to modify them.

Some of them are described below:

RwDebug | Generate RwDebug.rw debug information.
ACPIASLDecode | Enable/Disable ACPI decoding AML to ASL, since the function is not fully test and may hang the program, user may set it to zero to disable the function, and save the AML code and send back by e-mail for debug.
SSDTCheckSum | Set it to zero to ignore the checksum of ACPI SSDT table.
PCIEMMIOonPCI | On PCIE system, RW will access PCI configuration space through MMIO if set to one.
PCIIOonPCIE | On PCIE system, RW will access PCIE configuration space (below 0x100) through IO if set to one.


Super I/O Section

Section - SUPERIO

RW will search for section [SIO1], [SIO2]... to detect super I/O chip in the system.

Example entry for super I/O winbond 83627 HF/F:

[SIO1] | Header, must be listed on [SUPERIO]
Name=W83627HF/F | The name displayed as caption on the window
InfoName=W627HF | The prefix file name of the information file, RW will append the logical device number to build the file name to load, for example, if user change the device to Ldn2 (UART A), RW will try to load W627HF2.IRW as the information file.
Detect=LocalA=0x2e; LocalB=0x2f; o(LocalA,0x87); o(LocalA,0x87); Local0=IID16(LocalA,LocalB,0x20); bkif0(sub,Local0,0x1752); bkif0(sub,Local0,0x3a52); LocalA=0x4e; LocalB=0x4f; o(LocalA,0x87); o(LocalA,0x87); Local0=IID16(LocalA,LocalB,0x20); bkif0(sub,Local0,0x1752); sub,Local0,0x3a52 | Detect routine: LocalA = Index port (0x2E), LocalB = Data port (0x2F), enter configuration mode, read super I/O ID, check the ID, if NOT break, try 0x4E/0x4F again. If the result of this routine is ZERO, that means super I/O is detected.
IndexPort=LocalA= | Assign index port, LocalA was used in detect routine
DataPort=LocalB= | Assign data port, LocalB was used in detect routine
EnterConfig=o LocalA 0x87; o LocalA 0x87 | The key to enter configuration mode
ExitConfig=o LocalA 0xaa | The key to exit configuration mode
Ldn0=FDC | List the logical devices, "Ldn#" will be identified by the program, "FDC" is for display only, where # will be used to change the logical device, i.e. set to offset 0x07. And all logical device number list here will be used for the "Save All" function.
Ldn1=Parallel Port |
Ldn2=UART A |
Ldn3=UART B |
Ldn5=KBC |
Ldn6=CIR |
Ldn7=Game Port, MIDI Port, GPIO Port 1 |
Ldn8=GPIO Port 2 |
Ldn10=ACPI |
Ldn11=Hardware Monitor |


SmBus Section

Section - SMBUS

RW will search for section [SMBUS1], [SMBUS2]... to detect SMBus controller in the system.

Example entry for Intel ICH SM bus controller:

[SMBUS1] | Header, must be listed on [SMBUS]
Name=Intel ICHx | The name displayed as caption on the window
Detect=Local0=Rpci32(0,0x1f,3,0); Sub(Local0,0x24c38086) | Detect routine: Check the vendor ID and device ID of the SM bus controller. If the result of this routine is ZERO, that means SM bus controller is detected.
InitSmBus= | Will be called before SM bus access, no special initial to take in this case.
GetBase=Local0=Rpci16(0,0x1f,3,0x20); Local0=And(Local0,0xfff0) | Get the SM bus I/O base.
ClearStatus=Wait{0,0x8000,o(Local0,0xff); Local1=i(Local0); And(Local1,0x9f)} | Clear the SM bus status, if (result !=StatusOk) then program exit with error.
SetAddress=Local1=Add(Local0,4); o(Local1, | How to set the smbus address of the device, it will be added to the tail of the string by the program.
SetCommand=Local1=Add(Local0,3); o(Local1, | How to set the command byte (index of the device) for byte read command, it will be added to the tail of the string by the program.
SetCounter=Local1=Add(Local0,5); o(Local1, | Set counter for block write command, it will be added to the tail of the string by the program.
ByteSetByte=Local1=Add(Local0,5); o(Local1, | How to set the data of the byte write command, it will be added to the tail of the string by the program.
GetCounter=Local1=Add(Local0,5); i(Local1) | Get the counter return from device (clock gen.)
StartByteCmd=Local1=Add(Local0,2); o(Local1,0x48) | The command to start the SM bus byte access.
WaitByteCmd=Delay 1; Wait{2,0x4000,Local1=i(Local0); BkIf1(And(Local1,4)); And(Local1,2)} | Wait for SM bus byte access done, if result=SmBusError, program exit.
ByteGetByte=Local1=Add(Local0,5); i(Local1) | For byte protocol, how to get the byte returned from the device.
StartBlockCmd=Local1=Add(Local0,2); o(Local1,0x54) | The command to start the SM bus block access.
WaitBlockCmd=Delay 100; Wait{1,0x4000,Local1=i(Local0); BkIf1(And(Local1,4)); And(Local1,1)} | Wait for SM bus block access done, if result=SmBusError, program exit.
BlockOffset=Local9=7 | Prepare the offset to get/set the first byte of the block command.
BlockSetByte=Local1=Add(Local0,Local9); o(Local1, | How to set byte value for the block write command, it will be added to the tail of the string by the program.
BlockGetByte=Local1=Add(Local0,Local9); i(Local1) | For block protocol, how to get a byte returned from the device.
BlockCount=1 | For block protocol, maximum number of the SM bus controller buffer for each separate command.
BlockNextCmd=o(Local0,0xff); Wait{0x80,0x4000,Local1=i(Local0); BkIf1(And(Local1,4)); BkIf0(And(Local1,1)); And(Local1,0x80)} | For block protocol, how to start next transfer, if the block command need to be separated.
BlockNextOffset= | Prepare the offset to get/set the next byte of the block command, if the block command need to be separated and the offset is different between separated commands.
RestoreSmBus= | Restore the SM bus controller if needed.
StatusOk=0 | Value to be checked for SM bus ready in ClearStatus command.
SmBusError=4 | Error value for WaitByteCmd and WaitBlockCmd, if match then program exit with error.
ClockGenAddress=0xd2 | The clock generator SM bus slave address, usually is 0xD2.


Specific I/O Index/Data

Section - I/O Index/Data

RW will search for section [IOID1], [IOID2]...

Items list in this section will be added to the "Specific" program menu, just follow the rules in the example.

Example entry for the extended CMOS of SiS693 south bridge:

[IOID4] | Header, must be listed on [SUPERIO]
Name=Extended CMOS (SiS69x) | The name displayed as caption on the window
IndexPort=0x70 | Index port
DataPort=0x71 | Data port
EnterConfig=Local0 = rpci 0 2 0 48; Local1 = and Local0 3f; Local1 = or Local1 80; wpci 0 2 0 48 Local1 | How to enable the access, we need to set a bit in south bridge in this example.
ExitConfig=wpci 0 2 0 48 Local0 | How to disable the access, in this example, Local0 is the value saved in EnterConfig command, now we restore it after done.


Specific I/O Space

Section - [IOSPACE]

Items list in this section will be added to the "Specific" program menu, just follow the rules in the example.

Example entry for IO space 0x400:

[IOS1] | Header, must be listed on [IOSPACE]
Name=Port 400 | The name displayed as caption on the window
IoBase=0x400 | The starting I/O port


Memory Section

Section - [MEMORY]

Items list in this section will be added to the "Specific" program menu, just follow the rules in the example.

Example entry for I/O APIC Memory Space:

[MEM1] | Header, must be listed on [MEMORY]
Name=IO APIC | The name displayed as caption on the window
MemoryBase=0xFEC0000 | The starting memory address


PCI Sections

Section - [Vendor], [SpecialPci], [PciClass] and [PciType]

Some information used by PCI (PCI Express) window, user may add new defined device name or modify them if needed, everything on these sections are just for display, will not impact the main function.


USB Sections

Section - [UsbVendor] and [UsbClass]

Provide USB Vendor name list and USB Class, Subclass, Protocol for display in USB information sub-function.


Read Write Windows

This topic describe the details of the Read & Write window which used by PCI, Memory, I/O Space, I/O Index/Data, Clock Generator and DIMM SPD sub-functions.

List the file extension defined by RW:

Extension | Description
*.RW | File used by "Save" & "Save All" function, the format is compliable with RU
*.BIN | File used by "Save as binary" function
*.IRW | Information file used by Information window


Save

Save the current data in the grid to a file.


Save All

Save all detected to a file, this function is for PCI devices, Super I/O logical devices and DIMM's SPD.


Save as binary

Save the current grid data to a file with binary format. For memory window, user will be asked to input the start address and the length to be saved.


Load

Load and write data from a file, the file must be in ".RW" format, that could be saved by "Save" or "Save All" function.


Search

Simple, search in the grid window to find a HEX list or a ASCII string, specially for memory window, it will ask user to input the range to search, this is useful when trying to locate a specific string in memory.


Byte (8 bits) display

Switch the display to byte (8-bit) format.

F7 function key will switch the format between byte, word and dword.


Word (16 bits) display

Switch the display to word (16-bit) format.

F7 function key will switch the format between byte, word and dword.


Dword (32 bits) display

Switch the display to dword (32-bit) format.

F7 function key will switch the format between byte, word and dword.


Load Information File

Load information file onto the information file, when moving the cursor position inside the grid window, information window will try to locate description of the current data and display it if found, please check below for the information file format.

[INFO] | this is the header and cannot be changed
Name=XXXX | where XXXX is the name for the device which will be displayed at the first line in the information window
00=description of 00 | description for specific location, use "\r" to change line in the information window
01=description of 01 |
: |
: |
A0=description of A0\r b0 - meaning of bit0\r b1 - ... |
A1=description of A1 |
: |
: |
: |

User may check PCISTD.IRW for a example.


Manual Refresh

When the auto refresh function was disabled, this button is allowed to be pressed to order RW to refresh the grid data, that means to read the hardware again, press F9 function key will got the same result.


Help

To get help, also F1 key do the same thing, a CHM (HTML HELP) format file (the file you are reading right now) will be displayed to user.


Auto Refresh

Auto refresh indicator and also is button to config the refresh rate, user may disable it to enable the manual refresh button. The refresh rate range is 1 millisecond to 5 seconds.


Data Grid

This is main operation data window, user may edit the data by double click the left button of the mouse, or just press the numeric 0-9, A-F key to enter the edit mode, and may press ENTER or arrow key to exit edit mode, once the grid window exit the edit mode, the data modified will be update to hardware immediately.

NOTE:

1. Double click on other registers will open the Bit Edit function.

2. Click on the mouse right button will open the popup menu if it exist.

PCI function only:

1. Double click the mouse left button on BAR registers will open the Memory or IO access.


Bit Edit

Bit Edit function, double click (except PCI BAR registers) on the data grid window or use popup menu (mouse right click) to open it.

1. It will follow the BYTE/WORD/DWORD data access mode.

2. It will provide the "Value in File" for user to load from file if the data grid is in compare mode.


Information part

Display information of the specific data according to the current position of the grid window, check Load Information File topic for detail.


Text part

Display the data as text (ACSII) format; read only, user cannot use this window to modify the hardware.


Summary part

Display the summary information for PCI device.


About

Now this amazing utility comes...can offer you more.

The great feature of this utility is portable, it can handle any new chipset (SMBus controller) and new Super I/O, and the information file interface provides an easy way to check the definition of the registers.

Some of the functions may not have been fully tested; any suggestion or bug report is welcome.

If anyone made any improvement into RW.INI, or create any new ".IRW" file, and of course, after fully test, please send back to ckimchan.tw@yahoo.com.tw, If it is correct and useful, I will put it on the next release, enjoy.


Revision History

v1.6.7 | 12/19/2014
1. | Fixed ACPI FDPT decode issue.
2. | Support Win PE environment.
3. | Support SPD write function.
v1.6.6.1 | 9/30/2014
1. | Improve ACPI decode function.
2. | Add /NoLogo parameter.
3. | Support X99 chipset DDR4 SPD.
4. | Fix CPU MSR write function.
5. | Minor bug fixed.
v1.6.5.9 | 1/6/2014
1. | Improve ACPI decode function.
2. | Fix XP 32bit missing API error.
v1.6.5 | 10/25/2013
1. | Improve ACPI table searching method.
2. | Change IO space access length according to the display width (byte/word/dword).
3. | Support BayTrail smbus controller.
4. | Support unpartitioned disk read/write.
5. | Improve start up speed.
v1.6.4 | 5/29/2013
1. | Monitor USB device change event to update USB info.
2. | Add SMBIOS command script.
3. | Fix help file cannot be opened issue.
4. | Fix native 64bit exception issue.
5. | Fix command line script issue.
6. | Fix CPUID command.
7. | Change CPU speed to bus speed.
8. | Add PCIE base detect option.
v1.6 | 5/5/2013
1. | Support native 64bit.
2. | Add USB 3.0 speed (super speed) info.
3. | Fix SPD DIMM menu shift issue.
4. | Give warning if trying to over write saved file.
5. | Minor improvement and bug fix.
v1.5.3.7 |
1. | Fix ACPI function short-cut key issue.
2. | Fix SMBios structure type 14.
3. | Fix USB info device description.
4. | Re-support E820, PCITree, PCIRes command.
v1.5.3.1 | 09/14/2012
1. | Fix WRMSR command error.
v1.5.3 | 06/09/2012
1. | Fix ACPI DMAR table.
2. | Fix option rom save to file function.
3. | Save all last open windows for auto start on next launch.
4. | Add ACPI FPDT table support.
5. | Improve cout and setenv command.
v1.5.2 | 01/09/2012
1. | Display both DSDT and XSDT if found.
2. | Speed up ACPI decoding.
3. | Improve serial port code for remote access.
4. | Improve E820 function.
5. | SMBIOS structure bug fixed.
6. | Improve remote access code.
7. | Modify disk access function.
8. | Fix interpreter bugs.
9. | Add access width control.
10. | Fix SMBios bugs.
11. | Fix ACPI decode issues.
v1.5.1 | 08/30/2011
1. | Decode ACPI XSDT if exists.
2. | Add PCITREE, PCIRES command script.
3. | Add Intel Ivy bridge smbus controller for DIMM SPD information.
4. | Fix: driver can't reload if program exit abnormally.
5. | Improve help file context display code.
6. | Improve disk read/write function.
7. | Fix unsetenv command.
8. | Support AMD DRAM DCT0/1 direct access.
9. | Improve SPD XMP decode.
10. | Improve E820 function.
v1.5 | 04/14/2011
1. | New script command: BSWAP - changes byte order from big endian to little endian or vice versa.
2. | Support AMD AM3r2 CPU PCI extended registers.
3. | Modify remote access for UEFI.
4. | Fix debug mode cannot generate AcpiTbls.bin issue.
5. | Update rw.ini to registry if rw.ini is read only.
6. | Check CPU ID for user define MSR registers.
7. | Display ACPI tables even decode error.
8. | Support /Stdout and /Stderr command line option for console output.
9. | Support direct command with /Command parameter.
10. | Support portable version.
11. | New command script: Setenv, Unsetenv, Cout and Cerr.
12. | Support binary prefix 0b for binary input.
13. | Super IO Chip and SMBus Controller can be selected from Specific menu.
14. | Add PCI Device Tree information.
15. | Add PCI resource summary information.
16. | Fix Nuvoton NCT6776F detection issue.
17. | Add EDID function.
18. | Add E820 function.
v1.4.9 | 02/11/2011
1. | Improve ACPI and SMBIOS search routine for UEFI system.
2. | Improve AHCI mode HD/CD function.
3. | Display execution details for command group.
4. | New command script: ACPI, Disk.
5. | New disk read/write function.
6. | Add decode SPD binary file.
7. | Fix 64bit memory save file dialog issue.
8. | Fix smbus command script function.
9. | Fix W627 SIO GPIO info.
10. | Support /Min command line option.
11. | Support Nuvoton NCT5577D/NCT5573D.
12. | Modify unknown Super IO LDN detect routine.
v1.4.8.5 | 10/20/2010
1. | Support SMBIOS specification 2.7.
2. | Fix CPU MSR function: Check MTRRCAP before accessing MTRR registers.
3. | Support Nuvoton NCT6776F super I/O.
4. | Fix USB descriptor for HID device.
5. | Support ITE IT8502E super I/O.
6. | Support VIA VX900 chipset SMBus function.
7. | Update Intel PCH chipset SMBus detection code.
8. | Support Embedded Controller (EC) command script.
9. | Display SATA interface speed in HD/CD function.
10. | Fix AHCI mode HD/CD function.
11. | Support accessing memory above 4GB on 64bit OS.
12. | Support ACPI and SMBIOS table on UEFI system.
13. | Decode saved .rw ACPI table file.
v1.4.7 | 1/25/2010
1. | Fix SMBIOS type 7 cache size information.
2. | Fix ACPI SLIT table information.
3. | Add ACPI MSCT table information.
v1.4.6 | 1/7/2010
1. | Search EBDA area for ACPI RSDP table.
v1.4.5 | 1/6/2010
1. | Fix AML size checking method.
2. | Fix XMP SPD QPI Voltage information.
3. | Improve class structures.
v1.4 | 9/1/2009
1. | Fix GPIO base routines.
2. | Improve driver for accessing ATA/ATAPI identify data.
3. | Display PnP BIOS header in option ROM function.
4. | Support Nuvoton NCT6771 super I/O.
5. | Improve ASL decoder: Remove root char before adding to name space.
6. | Fix ASL decoder: CondRefOf accepts SuperName object as first argument only.
7. | ACPI function: Fix routine for searching SSDT extended table.
v1.3 | 6/9/2009
1. | Fix ACPI AML decoder: User method with parent prefix character may get error.
2. | Support ITE8720 super I/O.
3. | Modify the bottom of PCIE base address for detection routine.
4. | New Commands: RSIO, RSIO16, RSIO32, WSIO, WSIO16, WSIO32.
5. | New Commands: SIO interface for Save/Load.
v1.2 | 4/14/2009
1. | Fix PCI option ROM info: PCI Data Structure.
2. | Fix Memory save as binary function.
3. | Memory function improve: Alt,Ctrl or Shift + PageUp/PageDown to adjust address offset 0x1000, 0x10000, 0x100000 respectively.
4. | Fix: Display "Information file format error." message when user select "Cancel" on load information file button.
5. | Support XMP version 1.2 in DIMM SPD function.
6. | Support Intel PCH chipset SMBus function.
v1.1 | 3/2/2009
1. | Add Intel SCH SMBus support.
2. | Support Windows 7.
3. | Check DIMM type before using the SPD data.
4. | Fix USB information function.
v1.0.1 | 2/4/2009
1. | Add SIO Winbond W83627DHG support.
v1.0 | 1/21/2009
1. | Fix command line "Logfile" option.
2. | Fix: Some SMBIOS structures may get wrong displayed.
3. | Fix: Some platforms may get error when program start.
4. | Fix SMBIOS save function: Remove redundant entry.
5. | Add SMBus command, also in Save/Load function.
6. | Fix CPU MSR save function.
7. | Fix Intel ICH GPIO summary.
8. | Add Super IO Winbond W83667HG-A support.
9. | Fix Super IO GPIO5 info display for Winbond W83627EHF and W83667HG.
v0.36 | 10/29/2008
1. | Fix SMBus device write byte/block mode always start from index zero issue.
2. | Fix refresh rate setting.
3. | Fix: Status bar info incorrect in compare mode.
4. | Improve command interpreter: Add SAVE/LOAD command, remove RMTF/WMFF command.
5. | Do not detect PCIE base under address 0xD0000000.
6. | Fix: Cannot write CPU MSR register on single core CPU.
v0.35 | 9/15/2008
1. | Update PCIE base address detection routine for 32MB alignment support.
2. | Display nVidia GPIO info in PCI summary screen.
3. | Super IO issue fixed: Switch LDN back after displaying Win627/Win667 info.
4. | AML decode issue fixed: Dropping too much tailing underscore for name object.
5. | Display Verb table of HD audio device in the summary screen.
6. | AML decode improvement: use ToUUID macro for Buffer(0x10) in method _OSC and _DSM.
7. | AML decode fixed: Wrong TermObject and TargetObject for ToBufferOp.
8. | Use performance counter to calculate AMD CPU speed.
9. | Fix PCI save all function for PCIE devices on the system without PCIE MMIO support.
10. | Improve the status bar information for SMBus function.
v0.34 | 8/1/2008
1. | Improve command interpreter: Add DMEM and FMEM function, modify FPCI and FPCIClass function.
2. | Add Super IO Winbond W83667HG.
3. | Fix: OpenHCI 1394 GUID may get wrong display.
4. | Fix: CPU MSR register function may get "Error to switch CPU" error message.
5. | Fix: CPU speed may be wrong on AMD black edition Phenom CPU.
6. | Follow the display size (Byte, Word or Dword) to access memory.
v0.33 | 7/7/2008
1. | Improve PCIE memory base detection routine.
2. | Add ACPI WHEA tables: ERST, BERT, HEST and EINJ.
3. | Display binary data in option ROM function.
4. | Display Intel ICH GPIO information in PCI function.
5. | Update DIMM SPD function for EPP memory.
6. | Improve ACPI SPCR table.
7. | Improve memory function: support "Load binary" from file.
8. | New Command: RMTF (Read Memory To File) and WMFF (Write Memory From File).
v0.32 | 5/12/2008
1. | Fix ACPI save all function.
2. | Fix PCI extended registers compare function.
v0.31 | 3/28/2008
1. | Fix PCI Index/Data write function.
2. | Improve Bit Edit function.
3. | Improve CPU MSR function.
4. | Add file decode into DIMM SPD function.
5. | Fix DIMM SPD's summary information.
6. | Fix the write function on AMD CPU additional register.
v0.30 | 3/3/2008
1. | Add EPP and XMP details in the summary of DIMM SPD function.
2. | Update PCI vendor name list and correct some wording mistake.
3. | Support ICH10 Smbus controller.
4. | Add Bit Edit function, double click on the grid window or use popup menu to open it.
v0.29 | 2/3/2008
1. | Increase the COM port thread receive buffer for remote access function.
2. | Fix the MSR list count from initial file.
3. | Improve the CPU speed detect routine for AMD CPU.
4. | Save the setting when receiving query end session message.
5. | Fix AMD unlock Phenom CPU displaying "Floating point overflow" error message when using MSR function.
6. | Add "RDTSC", "RDPMC", "RDCR", "WRCR" support in Command function.
7. | Modify XP, 2K driver to improve IO port access.
v0.28 | 12/18/2007
1. | Improve CPU Speed detection code.
2. | Fix AHCI port detection code.
3. | Add DDR3 timing information.
4. | Add Winbond W83627DHG support.
5. | Add manifest control file.
v0.27 | 09/26/2007
1. | Fix: ACPI SLIC OEM Table ID decode may get error message.
2. | Add SMBus controller: nVidia MCP77/MCP78 (Modify algorithm to support MCPxx).
3. | Improve Command Interpreter: Add FpciClass (Find PCI Class) and RwExit command.
4. | Add Command Line Support: "/Command=<FileName>" and /LogFile=<FileName>".
v0.26 | 08/03/2007
1. | Improve ACPI decode: User method name with root prefix does not log in namespace.
2. | Fix ACPI treeview search function issue: First search need to click two times.
3. | Add information screen in ATA/ATAPI identify data function.
4. | Add summary for SuperIO Winbond W83627EHF/EHG
5. | Add AMD SB700 southbridge SMBus support.
6. | Fix RW cannot run on Win98 issue. (after v0.20)
7. | Modify INI file access routines to improve memory usage.
8. | Switch system back to normal mode after uninstall from Vista64.
9. | Display Bank x Row x Column information in DIMM SPD function.
10. | Support AMD AM2/AM2+ DRAM controller additional registers in specific PCI Index/Data menu.
v0.25 | 06/23/2007
1. | Fix memory allocation and deallocation routines.
2. | Display MAC address information for Ethernet devices.
3. | Improve ACPI name space search function.
4. | Increase the input buffer size to improve remote COM port debug function.
5. | Add Winbond W83L517G, W83627UHG Super IO support.
6. | Add ITE IT8726F, IT8510E, IT8511E, IT8512E Super IO support.
7. | Add Fintek F71805F/FG, F71862, F71882/F71883 Super IO support.
8. | Fix SMBus: Load saved data file will blank out SMBus device.
9. | Improve PCI: Support AMD AM2+ PCI extended configuration space.
10. | Fix ACPI "Save all" function does not work issue.
11. | Improve ACPI: Decode tables and AML codes from input file.
12. | Add SMBus controller: nVidia MCP73.
v0.24 | 06/15/2007
1. | Improve DIMM SPD function: Modify Jedec ID reading method to report DIMM vendor in summary window.
2. | Improve PCI function: Display GUID in summary window if device is IEEE OpenHCI 1394.
3. | Add MP Configuration table.
4. | Fix ACPI ASL decode function: Processor name space is incorrect if system have more than one logical CPU.
v0.23 | 03/05/2007
1. | Improve ACPI: Validate structure size for ACPI SLIC, APIC, SRAS and DMAR tables.
2. | Improve ACPI: Add switch in RW.INI to control ACPI tables decoding.
3. | Improve ATA/ATAPI: Add AHCI command support.
4. | Fix: Double click at data grid window causes exception error.
5. | Add hint message on SMBus address input box: "Format: Bit[7:1] = Address + Bit[0] = 0".
6. | Modify all Save to file function, add summary information if present.
7. | Fix: PCI device Information file does not load sometimes.
8. | Fix: Write function may fail after switching the display mode to Word or Dword.
9. | Add SMBus Word protocol support.
10. | Rewrite remote access routines to support serial port connection.
11. | Display DIMM vendor information.
12. | Add PCI option ROM information.
v0.22 | 01/16/2007
1. | Improve LPT remote connection: Add switch to disable SMBus by default, it takes too long to link to remote.
2. | Modify INI file reading routine, ignore SIO= and SMBUS= sections.
3. | Improve: Try to use Vendor default access method for Super IO if it is not detected.
4. | Remove Website1.
5. | Use ShellExecute function call to open Website instead of calling IE.
6. | Fix ACPI SRAT table decode issue.
7. | Add ERST, DMAR ACPI table decode.
8. | Fix: PIO mode of IDE info. incorrect if it is not mode 4.
9. | Improve AML decode: Search the input file for valid AML header before decoding.
10. | Add ICH9 SMBus support.
11. | Initial some critical items to default value after reading RW.INI to prevent exception at second run.
12. | Rewrite ACPI APIC table to support new APIC structures.
13. | Support unknown structure type for ACPI SLIC, APIC, SRAS and DMAR tables.
14. | Fix USB info: Endpoint descriptor Transfer Type always displayed as "Interrupt".
15. | Rewrite ATA/ATAPI function to support IDE, RAID and AHCI controller.
16. | Add CPU Clock info. in CPU MSR function.
v0.21 | 11/08/2006
1. | Add Twr, Twtr and Trtp timing into DIMM SPD information screen.
2. | Add ACPI table decode support: SLIC (Software Licensing Description Table).
3. | Fix: Double click on PCI BARs does not invoke memory or IO space function. (issue happen after v0.19)
4. | Fix: Info. displayed in ACPI RSDP Revision field is incorrect if the revision > 1.0.
5. | Fix: Refresh timer setting info display, 1ms, 2ms...should be 10ms, 20ms...
6. | Fix: ACPI decode error on some user term of method op.
7. | Support Vista 64: need to "Run as administrator", need to restart OS once after install.
8. | Support nVidia MCP67/MCP68 SMBus controllers.
v0.20 | 10/19/2006
1. | Add SiS966 and SiS968 smbus entry in INI file.
2. | Improve: Scan PCI bus number up to 0xFF.
v0.19 | 09/15/2006
1. | Fix mouse wheel will scroll two pages in one click in memory access function.
2. | Force user to close the "string not found" dialogue of memory search function before continue.
3. | Move CPU MSR registers define to RW.INI, so that MSR function can display more registers if needed.
4. | Add SIO chipset support: ITE IT8718F.
5. | ACPI AML decode improvement: Repair bad character in name.
6. | ACPI AML decode improvement: Check package length for overflow.
v0.18 | 08/03/2006
1. | Add subsystem ID of P2P bridge display in PCI summary window.
2. | Unload driver when program exit to prevent conflict with other program running at full screen DOS prompt (RU).
3. | Hide refresh button if the function (SPD, ClockGen and SMBus) does not support it.
4. | Set maximum PCI bus number to 0xF0 for scanning.
v0.17 | 07/25/2006
1. | Add nVidia MCP65 SMBUS support.
2. | Fix: IO Index/Data port is incorrect in some case when RW restart.
3. | Fix: Miss "Return" character to separate tables in the file saved by "save all" of ACPI function.
v0.16 | 05/09/2006
1. | ACPI AML decode bug fix: Decode error if ExtOpPrefix follows Store Op code.
2. | Fix ACPI HPET table information.
3. | Improvement AML decode: Change field bit offset to "Offset" macro.
4. | Add SMBIOS structures function.
5. | Modify the code for avoiding multiple instances of RW.
v0.15 | 01/06/2006
1. | Modify the Interpreter "Delay" command to fix SMBus function hang on some systems.
2. | Modify RW.INI to support ICH7/ICH8 SMBus function.
3. | Add SIO chipset support: FinTek F71872, ITE IT8716F.
4. | Add ULI1575 SMBus support.
5. | Fix: DDRII DIMM size report is incorrect if its size is more than 2GB.
6. | Modify driver to support AMD K8 MSR register read/write.
7. | Modify USB function: add HUB descriptor, Device Qualifier descriptor, Other Speed descriptors.
8. | Support SMBus function on chipset: nVidia MCP55, MCP61 and ATi SB600.
9. | Add more website links: Website2: http://home.kimo.com.tw/ckimchan.tw/ Website3: http://jacky5488.myweb.hinet.net/
10. | Provide End Address input for memory save as binary function.
11. | Support SMBus controller with more than one IO base address (nVidia chipset).
Beta 0.14 | 11/16/2005
1. | Add PCIEMMIOonPCI in RW.INI to control access behavior on PCIE system: for PCI device: if =1, access the dvice through MMIO; if =0, access the device through IO.
2. | Add PCIIOonPCIE in RW.INI to control access behavior on PCIE system: for PCIE device: if =1, access the device through IO if index is below 0x100; if =0, access the device through MMIO.
3. | PCI function bug fixed: unable to write PCIE configuration space if the offset is above 0x100.
4. | ACPI AML decode bug fixed: If any user term method name also used as name string in different scope, decode will treat all name string as method term, so that AML decoding may get unpredictable result.
5. | ACPI AML decode bug fixed: If \_OSI follow by string, it should be treated as control method with one argument.
6. | Optimize USB information subfunction: use tree view with object instead of string list.
7. | ACPI AML decode bug fixed: Decode "Package" may get error if the data type followed is too complicated.
8. | ACPI AML decode bug fixed: Remove the duplicated "ThermalZone" under _TZ scope.
9. | ACPI function fixed: Find text function may get violation error.
10. | Modify DIMM SPD function: Add [DIMMSPD] section in RW.INI to declare number of DIMM slot and their address, auto detect memory slot when function start.
11. | DIMM SPD function bug fixed: Cycle Time and Single/Double side information are incorrect in summary window for DDRII memory.
12. | Add PCI Index/Data function.
13. | Modify IO space function to support ACPI Power management IO space: skip reading offset 0x14 to 0x17.
14. | Add Embedded Controller function: read/write EC RAM.
15. | Add ACPI table decode support: TCPA, SPMI, CPEP, SLIT and SRAT.
16. | Add Popup menu in PCI function: 1. Rescan PCI Bus, 2. Open IO Space, 3. Open Memory Space, 4. Open PCI Index/Data.
17. | Modify XP and 64bit XP memory access driver (do not use HAL function call).
18. | Handle mouse wheel up/down and keyboard PageUp/PageDown events in memory access function.
19. | Add eRPCI, eRPCI16, eRPCI32, eWPCI, eWPCI16, eWPCI32, eRPCIE, eRPCIE16, eRPCIE32, eWPCIE, eWPCIE16 and eWPCIE32 to command Interpreter function.
20. | Fix ITE Super I/O cannot be detected issue, the detect routine in RW.INI is incorrect.
21. | Super I/O function bug fixed: If no Super I/O chip is detected by RW, clicking the "Cancel" button in Index/Data input dialogue will get memory violation error.
22. | Memory function bug fixed: Find ASCII string is incorrect if there is special character within the string.
23. | Add Memory Index/Data function.
24. | Modify ACPI function: 1. Remove "Save AML" button, add "Save as binary" and "Save all as binary" button for all tables. 2. Not only for DSDT, now decode AML to ASL function support SSDT also.
25. | Add "PCI Index/Data" and "Memory Index/Data" to specific menu, defined in RW.INI.
26. | Modify the "save to file" function of CPU MSR function: Save the data to normal text file, (with 0x0D, 0x0A at the end of line).
27. | Modify RW.INI to support VIA VT8237A SMBus function.
28. | PCI Function bug fixed: Interrupt Line information will display as "none" if the IRQ# is larger than 23.
29. | Display namespace tree for ACPI ASL code, perform the find text function when user click the namespace.
Beta 0.13 | 10/03/2005
1. | Modify RW.INI PCI Vender name info: Vendor ID 0x10B9 = "ULi".
2. | ACPI function bug fixed: According to ACPI spec., not just F segment, searching RSDP should include E segment also, EBDA area still not supported because I don't think BIOS will use it.
3. | PCI function bug fixed: changing refresh timer from "Enabled" to "Disabled", the manual refresh button does not available automatically.
4. | Add ACPI table decode support: WDRT (watchdog resource table).
5. | Add ACPIASLDecode switch in RW.INI to control ASL decode function.
6. | PCI function bug fixed: double click the BAR address to invoke memory function, the memory address saved for restart is incorrect.
7. | Improvement: save/restore the starting order of functions when program exit/restart.
8. | LPT remote access function bug fixed: only BSP CPU MSR function is supported.
Beta 0.12 | 07/13/2005
1. | Fix: if RW.INI is readonly or write error, program will generate exception and cannot be terminated.
2. | Fix: LPT remote access fail if refresh set to enable on multi-function mode.
3. | Support Win627EHF/EHG Super IO chip.
4. | Support nVidia Chipset nForce2, nForce3 and MCP51 SMBus function.
5. | Support "Enter Config Key" command in IO index/data function, so that it can be used to access unknown super IO device.
6. | Support manual mode in super IO function, so that it can be used even super IO is not detected.
7. | Add search text function in ACPI dump function.
8. | Add VIA sourth bridge 8251 SMBus support.
9. | Fix: exception happen when try to load batch file in Command function if the file is not exist.
10. | Add status messages in the status bar.
11. | Add Super IO chip support: SMSC LPC47S42x, LPC47M15x/LPC47M192, LPC47B272, LPC47M10x/LPC47M112, LPC47M14x, LPC47M172, LPC47M182, SCH5017.
12. | Make improvement on Command Window function, add FPCI (Find PCI Device) and CMZ (Complement Zero) command.
13. | Add RW Website http://rw.net-forces.com/ link in main menu, thanks for Andre Courchesne to provide and maintain the website.
14. | Add PCI vendor list in rw.ini, also make improvement on the access routines.
15. | Add USB information sub-function: enumerate all the host controllers, then report status and descriptors.
16. | PCI function new feature: double click on the BAR address will open the related Memory/IO space.
17. | Fix: ATA identify data displayed in wrong order: switch high-byte and low-byte.
18. | Rewrite CPU MSR function to support multiprocessor system.
19. | Add ITE IT8711F super IO support.
20. | Optimize ACPI sub-function to save runtime memory.
21. | Add "CPU" in "Command" function to select working CPU in case of multiprocessor system.
22. | Modify some look and feel icons.
23. | Add 64bit driver to support XP 64bit and Windows Server 2003 64Bit.
24. | Add SMBus entry in RW.INI to support ULi M1573 south bridge.
Beta 0.11 | 02/15/2005
1. | Add SMART feature report in summary screen of ATA function.
Beta 0.10 | 01/26/2005
1. | Add LPT Remote Access item into this help file.
2. | Add DDR2 support in SPD function.
3. | Provide bus clocks for Trp, Trrd... timing info in SPD function.
4. | Fix: ACPI table cannot be found on some systems. (RSDP cross the boundary)
5. | Fix: Decode AML to ASL function may hang on some systems. (User term list)
6. | Add ACPI OEMx table support in ACPI function.
7. | Add ACPI ECDT table support in ACPI function.
8. | Fix: Decode AML to ASL report error when "Divide" operator used but "Remainder" is not included.
9. | Support ACPI 2.0 RSDP structure.
10. | Fix: Decode AML to ASL hang if command "Acquire" or "Fatal" is included in definiation block.
11. | Combine DSDT table information with ASL code.
12. | Add ACPI MCFG, DBGP, SPCR table support in ACPI function.
13. | Scan and display all ACPI tables under RSDT even if it is unsupported.
14. | Support ACPI SSDT table.
Beta 0.09 |
1. | Modify CPU MSR register function, display more informations.
2. | Modify RW.INI to support ICH6 south bridge chipset.
3. | Modify RW.INI to support ATI SB400 south bridge chipset.
Beta 0.08 |
1. | Fix: Sometimes CPU MTRR physical memory variable range information get wrong report.
2. | Fix: Clock gen. counter always report zero. (After Beta 0.05)
3. | Add LPT debug function.
Beta 0.07 |
1. | Support SiS965 SMBus (Add entry to RW.INI only).
2. | Add ATA/ATAPI Identify Data sub-function.
3. | Add delay to startup logo.
Beta 0.06 |
1. | Add PCI Express support.
2. | Modify startup logo (Win2000, WinXP only).
3. | Add summary screen in PCI funciton.
4. | Add summary screen in DIMM SPD function.
5. | Modify this help file.
6. | Update RW.INI to suppport ICH6.
7. | According to PCI 2.3 spectfication, update the [PCIClass] section of RW.INI file.
Beta 0.05 |
1. | Fix CPU MTRR physical memory variable range information error.
2. | Modify SMBus sub-function, inculde byte and block access mode.
Beta 0.04 |
1. | Add SMBus sub-function, access all address with read and write.
Beta 0.03 |
1. | Fix dis-AML function bug.
Beta 0.02 |
1. | Fix edit window will not update to hardware if user double click the mouse to enter edit mode.
2. | Remove the limitation of memory map method, now memory start address can be any where within 4GB.
3. | Fix the save function on the ACPI table dump sub-function.
4. | Modify RW.INI to support SiS964 and VIA8237 chipset (SMBus for DIMM SPD and Clock generator)
5. | Add dis-AML (AML to ASL) function on ACPI table dump sub-function, but not fully test.
6. | Make modification and correction on this help file.
Beta 0.01 |
1. | First beta release


Super I/O Support List

·Nuvoton

1.NCT6775F

2.NCT6772F

3.NCT6771F

4.NCT6776F

5.NCT5577D

6.NCT5573D

·Winbond

7.W83627HF/F

8.W83627SF

9.W83627THF

10.W83637HF

11.W83697HF

12.W83697SF

13.W83697UF

14.W83977ATF

15.W83977EF

16.W83L517D

17.W83L518D

18.W83L519D

19.W83627EHF/EHG

20.W83L517G

21.W83627UHG

22.W83667HG

·ITE

1.IT8700F

2.IT8702F

3.IT8705F

4.IT8710F

5.IT8711F

6.IT8712F

7.IT8761E

8.IT8716F

9.IT8726F

10.IT8510E

11.IT8511E

12.IT8512E

13.IT8720

·SMSC

1.LPC47S42x

2.LPC47M15x/LPC47M192

3.LPC47B272

4.LPC47M10x/LPC47M112

5.LPC47M14x

6.LPC47M172

7.LPC47M182

8.SCH5017

·FinTek

1.F71872

2.F71805F/FG

3.F71862

4.F71882/F71883

Note1: Super I/O function is still available even it is unknown, user may access it manually by enter the config key.

Note2: All supported Super I/O are defined in RW.INI.


SMbus Chipset Support List

 Top Previous

·Intel

1.ICH4

2.ICH5

3.ICH6

4.ICH7

5.ICH8

6.ICH9

7.ICH10

8.PCH

·SiS

1.SiS962

2.SiS963

3.SiS964

4.SiS965

5.SiS966

6.SiS968

·VIA

1.VT8235

2.VT8237

3.VT8237A

4.VT8251

·ULi

1.M1563

2.M1573

3.M1575

4.M1689

·ATI

1.SB400

2.SB600

·nVidia

1.MCP2

2.nForce3 (CK8S)

3.MCP51

4.MCP55

5.MCP61

6.MCP65

7.MCP67

8.MCP68

9.CK804

10.MCP73

Note1: SMBus function will not available if the chipset cannot be detected.

Note2: All supported SMBus chipset are defined in RW.INI.